1. Field of the Invention
The invention relates to the field of MOS read-only memories and their cells.
2. Prior Art
Numerous metal-oxide-semiconductor (MOS) read-only memories (ROMs) are well-known and commercially available. These ROMs generally fall into two categories, mask programmed ROMs and user programmed memories (PROMs). In the latter category, fusible links are used in memories which may only be programmed once, whereas silicon nitride layers or floating gate devices are used in erasable PROMs (EPROMs).
The mask programmed ROMs have the obvious disadvantage of storing only one predetermined program which is permanently imbedded in the memory. However, these devices have the advantage of lower cost, particularly in high production, when compared to PROMs.
Most often, mask programmed ROMs employ metal contacts to define the program. A special mask is generated based on the user's program and used to define these metal contacts near the end of the fabrication process. These "metal contact" ROMs are able to be nearly fully-fabricated before the metal contact mask is required, thus, partially completed wafers may be produced and stored. These memories, however, have the disadvantage of requiring a relatively large substrate area because of the metal contacts.
Another type of mask programmed ROM which has been proposed employs ion implanted regions in the substrate to define the program. Essentially, selected cells are made into depletion mode devices by ion implantation to store one of the binary states. While this memory requires substantially less substrate area than the "metal contact" ROMs, it is more difficult to fabricate because it requires large amounts of ion implantation. Moreover, the program must be implanted into the substrate at a very early stage of production.
The memory cells of the present invention employ double layer polysilicon technology; no metallization is required. The cells are of relatively small area; thus, much higher density ROMs are possible than with prior art cells with the same design rules. By way of example, a 64K ROM on a 100 mil.times.100 mil chip is realizable.